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Título del libro: 3rd World Congress On Industrial Process Tomography
Título del capítulo: Parallel realisation of the linear back-projection algorithm for capacitance tomography using TMS320c6701 digital signal processors

Autores UNAM:
DEMETRIO FABIAN GARCIA NOCETTI; LUIS ALBERTO AGUILAR CALDERON;
Autores externos:

Idioma:

Año de publicación:
2003
Palabras clave:

Algorithms; Capacitance; Computer architecture; Electric impedance tomography; Image processing; Image reconstruction; Parallel processing systems; Signal processing; System buses; Capacitance tomography; Digital signal processors (DSP); Electrical Capacitance Tomography; Global image reconstruction; Image reconstruction algorithm; Linear back projection; Linear back projection algorithms; Parallel processing; Digital signal processors


Resumen:

This work presents a high-performance parallel digital-signal-processor (DSP) architecture for the computation of the linear back-projection (LBP) image reconstruction algorithm used in electrical capacitance tomography. A system based on a PCI-bus compatible co-processor card with four TMS320C6701 DSPs was used. The improvement in global image-reconstruction speed that can be achieved running the LBP algorithm concurrently on 1, 2, 3 and 4 processors is examined. It was found that, with the programming scheme employed, the execution speed increases in an almost linear way with the number of processors, which confirms that the LBP algorithm lends itself well to the use of parallel processing. A performance analysis of the implementation is presented, demonstrating the effectiveness of the algorithm for real-time response. © 2003 International Society for Industrial Process Tomography. All rights reserved.


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